Cache Performance Review

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Assume that (i) main memory accesses take 50 ns and (ii) that memory accesses are 42% of all instructions. The L1 cache attached to the processor has the following features:

• L1 cache size is 4 KiB,
• L1 miss rate is 5.3%, and
• L1 hit time is 0.66 ns.

Assuming that the L1 hit time determines the cycle times, the clock rate = GHz

The AMAT of the processor = ns

Assuming a base CPI of 1.0 without any memory stalls, the total CPI =

Consider the addition of an L2 cache to the processor to presumably make up for its limited L1 cache capacity. The L2 cache has the following features:

• L2 cache size is 2 MiB,
• L2 miss rate is 63%, and
• L2 hit time is 9.32 ns.

The AMAT of the processor with the addition of an L2 cache   = ns

Assuming a base CPI of 1.0 without any memory stalls, the total CPI of the processor with the addition of an L2 cache =