Tentative Schedule


Week

Class Topic Reading Due Where
0 0. Computer Career and Data Research & Technologies      
  0.1 A computer career      
  0.2 Data research      
  0.3 Data technologies      
1 01/09
01/10
01/11
1. Introduction to CSCI 370 Chapter 1    
  1.1 Course outline    
  1.2 Historical perspective 1.12    
  1.3 Programming language generations      
  1.4 A language processing system      
2 01/16
01/17
01/18
2. Computer Abstractions and Technology Chapter 1    
  2.1 Below your program 1.1-1.3    
  2.2 Under the covers 1.4    
  2.3 Processor technologies 1.5    
  2.4 Memory technologies 1.5    
01/18  Last day to add a course or drop without record
 Last day to add audit or change to/from audit
 Last day to receive a refund on a dropped class
 Drops after the last day to add will appear on a transcript.
     
01/15
Holiday, Martin Luther King Jr. Day (Monday) — no classes
     
3 01/22
01/23
01/24
01/25
3. Computer Abstractions and Technology (Cont.) Chapter 1    
  3.1 Performance 1.6    
  3.2 The power wall 1.7    
  3.3 The sea change 1.8    
  3.4 Real stuff 1.9    
4 01/29
01/30
01/31
02/01
4. MIPS Assembly Programming App. A & Ch. 2    
  4.1 Programming Exercise I      
  4.2 MARS simulator A.2-A.4    
  4.3 MIPS CPU A.9    
  4.4 MIPS assembly language A.10    
5 02/05
02/06
02/07
02/08
5. MIPS Assembly Programming (Cont.) App. A & Ch. 2    
  5.1 Operations and operands 2.1-2.3    
  5.2 Data representations 2.4    
  5.3 Signed and unsigned numbers 2.4    
  5.4 Representing instructions in the computer 2.5    
6 02/12
02/13
02/14
02/15
6. MIPS Assembly Programming (Cont.) App. A & Ch. 2    
  6.1 Memory usage A.5    
  6.2 Logical operations 2.6    
  6.3 Instructions for making decisions 2.7    
  6.4 Supporting procedures in computer hardware 2.8 EX I  
7 02/21
02/22
7. MIPS Assembly Programming (Cont.) App. A & Ch. 2    
  7.1 Procedure call convention A.6  
  7.2 Communicating with people 2.9    
  7.3 MIPS addressing for 32-bit immediates and addresses 2.10    
  7.4 Translating and starting a program 2.12    
02/19
Holiday, Presidents’ Day (Monday) — no classes
     
02/20
Exam I (for both on-campus and on-line students; 6:30pm – 8:30pm, Tuesday)
     
8 02/26
02/27
02/28
02/29
8. Arithmetic for Computers Chapter 3    
  8.1 Introduction 3.1    
  8.2 Addition and subtraction 3.2    
  8.3 Multiplication 3.3    
  8.4 Division 3.4    
9
03/04

03/08
  Spring Break — no classes
     
10 03/11
03/12
03/13
03/14
10. Arithmetic for Computers (Cont.) Chapter 3    
  10.1 Floating point representation 3.5    
  10.2 Floating-point addition and subtraction 3.5    
  10.3 Floating-point multiplication 3.5    
  10.4 The guard, round, and sticky bits 3.5    
11 03/18
03/19
03/20
03/21
11. The Processor Chapter 4    
  11.1 Introduction 4.1    
  11.2 Logic design conventions 4.2    
  11.3 Building a datapath 4.3    
  11.4 Creating a single datapath 4.3
12 03/25
03/26
03/27
03/28
12. The Processor (Cont.) Chapter 4    
  12.1 A simple implementation scheme 4.4  
  12.2 Operation of the datapath 4.4
  12.3 The ALU control 4.4    
  12.4 Designing the main control unit 4.4    
13 04/02
04/03
04/04
13. The Processor (Cont.) Chapter 4    
  13.1 Pipelining overview 4.6
  13.2 Pipeline hazards 4.6    
  13.3 Pipelined datapath 4.7    
  13.4 Pipelined control 4.7    
04/05  Last day to change to or from S/U grading
 Last day to change to or from audit grading
 Last day to drop a full-term course or withdraw from school
     
04/01
Easter holiday (Monday) — no classes
     
14 04/08
04/10
04/11
14. The Processor (Cont.) Chapter 4    
  14.1 Data hazards 4.8    
  14.2 Forwarding versus stalling 4.8    
  14.3 Control hazards 4.9    
  14.4 Dynamic branch prediction 4.9    
04/09
Exam II (for both on-campus and on-line students; 6:30pm – 8:30pm, Tuesday)
     
15 04/15
04/16
04/17
04/18
15. Exploiting Memory Hierarchy Chapter 5    
  15.1 Introduction 5.1    
  15.2 Memory technologies 5.2    
  15.3 The basics of caches 5.3    
  15.4 Accessing a cache 5.3
16 04/22
04/23
04/24
04/25
16. Exploiting Memory Hierarchy (Cont.) Chapter 5    
  16.1 Measuring cache performance 5.4
  16.2 Improving cache performance 5.4  
  16.3 Virtual memory 5.7    
  16.4 Virtual memory performance 5.7    
17 04/29
04/30
05/01
05/02
17. Exploiting Memory Hierarchy (Cont.) Chapter 5    
  17.1 TLB 5.7    
  17.2 A common framework 5.8  
  17.3 A summary 5.8    
  17.4 Wrapping up    
18 05/07
Final exam (for both on-campus and on-line students; 06:30pm – 08:30pm, Tuesday)
     
19 05/14 Grades posted before noon, Tuesday      






      I was playing chess with my friend and he said,    
      “Let’s make this interesting.” So we stopped playing chess.    
      — Matt Kirshen