Week |
Class | Topic | Reading | Where | |||||
|---|---|---|---|---|---|---|---|---|---|
| 0 | 0. Computer Career and Data Research & Technologies | ||||||||
| 0.1 A computer career | |||||||||
| 0.2 Data research | |||||||||
| 0.3 Data technologies | |||||||||
| 1 | 01/14 01/15 01/16 |
1. Introduction to CSCI 370 | Chapter 1 | ||||||
| 1.1 Course outline | |||||||||
| 1.2 Historical perspective | 1.12 | ||||||||
| 1.3 Programming language generations | |||||||||
| 1.4 A language processing system | |||||||||
| 2 | 01/21 01/22 01/23 |
2. Computer Abstractions and Technology | Chapter 1 | ||||||
| 2.1 Below your program | 1.1-1.3 | ||||||||
| 2.2 Under the covers | 1.4 | ||||||||
| 2.3 Memory technologies | 1.5 | ||||||||
| 2.4 Processor technologies | 1.5 | ||||||||
| 01/23 |
Last day to add a course or drop without record Last day to add audit or change to/from audit Last day to receive a refund on a dropped class Drops after the last day to add will appear on a transcript. |
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| 01/20 |
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| 3 | 01/27 01/28 01/29 01/30 |
3. Computer Abstractions and Technology (Cont.) | Chapter 1 | ||||||
| 3.1 Performance | 1.6 | ||||||||
| 3.2 The power wall | 1.7 | ||||||||
| 3.3 The sea change | 1.8 | ||||||||
| 3.4 Real stuff | 1.9 | ||||||||
| 4 | 02/03 02/04 02/05 02/06 |
4. MIPS Assembly Programming | App. A & Ch. 2 | ||||||
| 4.1 Programming Exercise I | |||||||||
| 4.2 MARS simulator | A.2-A.4 | ||||||||
| 4.3 MIPS CPU | A.9 | ||||||||
| 4.4 MIPS assembly language | A.10 | ||||||||
| 5 | 02/10 02/11 02/12 02/13 |
5. MIPS Assembly Programming (Cont.) | App. A & Ch. 2 | ||||||
| 5.1 Operations and operands | 2.1-2.3 | ||||||||
| 5.2 Data representations | 2.4 | ||||||||
| 5.3 Signed and unsigned numbers | 2.4 | ||||||||
| 5.4 Representing instructions in the computer | 2.5 | ||||||||
| 6 | 02/18 02/19 02/20 |
6. MIPS Assembly Programming (Cont.) | App. A & Ch. 2 | ||||||
| 6.1 Memory usage | A.5 | ||||||||
| 6.2 Logical operations | 2.6 | ||||||||
| 6.3 Instructions for making decisions | 2.7 | ||||||||
| 6.4 Supporting procedures in computer hardware | 2.8 | ||||||||
| 02/17 |
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| 7 | 02/24 02/26 02/27 |
7. MIPS Assembly Programming (Cont.) | App. A & Ch. 2 | ||||||
| 7.1 Procedure call convention | A.6 | ||||||||
| 7.2 Communicating with people | 2.9 | ||||||||
| 7.3 MIPS addressing for 32-bit immediates and addresses | 2.10 | ||||||||
| 7.4 Translating and starting a program | 2.12 | ||||||||
| 02/25 (no class) |
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| 8 | 03/03 03/04 03/05 03/06 |
8. Arithmetic for Computers | Chapter 3 | ||||||
| 8.1 Introduction | 3.1 | ||||||||
| 8.2 Addition and subtraction | 3.2 | ||||||||
| 8.3 Multiplication | 3.3 | ||||||||
| 8.4 Division | 3.4 | ||||||||
| 9 | 03/10 – 03/14 |
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| 10 | 03/17 03/18 03/19 03/20 |
10. Arithmetic for Computers (Cont.) | Chapter 3 | ||||||
| 10.1 Floating point representation | 3.5 | ||||||||
| 10.2 Floating-point addition and subtraction | 3.5 | ||||||||
| 10.3 Floating-point multiplication | 3.5 | ||||||||
| 10.4 The guard, round, and sticky bits | 3.5 | ||||||||
| 11 | 03/24 03/25 03/26 03/27 |
11. The Processor | Chapter 4 | ||||||
| 11.1 Introduction | 4.1 | ||||||||
| 11.2 Logic design conventions | 4.2 | ||||||||
| 11.3 Building a datapath | 4.3 | ||||||||
| 11.4 Creating a single datapath | 4.3 | ||||||||
| 12 | 03/31 04/01 04/02 04/03 |
12. The Processor (Cont.) | Chapter 4 | ||||||
| 12.1 A simple implementation scheme | 4.4 | ||||||||
| 12.2 Operation of the datapath | 4.4 | ||||||||
| 12.3 The ALU control | 4.4 | ||||||||
| 12.4 Designing the main control unit | 4.4 | ||||||||
| 13 | 04/07 04/08 04/09 04/10 |
13. The Processor (Cont.) | Chapter 4 | ||||||
| 13.1 Pipelining overview | 4.6 | ||||||||
| 13.2 Pipeline hazards | 4.6 | ||||||||
| 13.3 Pipelined datapath | 4.7 | ||||||||
| 13.4 Pipelined control | 4.7 | ||||||||
| 04/11 |
Last day to change to or from S/U grading Last day to change to or from audit grading Last day to drop a full-term course or withdraw from school |
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| 14 | 04/14 04/16 04/17 |
14. The Processor (Cont.) | Chapter 4 | ||||||
| 14.1 Data hazards | 4.8 | ||||||||
| 14.2 Forwarding versus stalling | 4.8 | ||||||||
| 14.3 Control hazards | 4.9 | ||||||||
| 14.4 Dynamic branch prediction | 4.9 | ||||||||
| 04/15 (no class) |
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| 15 | 04/22 04/23 04/24 |
15. Exploiting Memory Hierarchy | Chapter 5 | ||||||
| 15.1 Introduction | 5.1 | ||||||||
| 15.2 Memory technologies | 5.2 | ||||||||
| 15.3 The basics of caches | 5.3 | ||||||||
| 15.4 Accessing a cache | 5.3 | ||||||||
| 04/21 |
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| 16 | 04/28 04/29 04/30 05/01 |
16. Exploiting Memory Hierarchy (Cont.) | Chapter 5 | ||||||
| 16.1 Measuring cache performance | 5.4 | ||||||||
| 16.2 Improving cache performance | 5.4 | ||||||||
| 16.3 Virtual memory | 5.7 | ||||||||
| 16.4 Virtual memory performance | 5.7 | ||||||||
| 17 | 05/05 05/06 05/07 05/08 |
17. Exploiting Memory Hierarchy (Cont.) | Chapter 5 | ||||||
| 17.1 TLB | 5.7 | ||||||||
| 17.2 A common framework | 5.8 | ||||||||
| 17.3 A summary | 5.8 | ||||||||
| 17.4 Wrapping up | |||||||||
| 18 | 05/13 |
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| 19 | 05/20 | Grades posted before noon, Tuesday |
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I was playing chess with my friend and he said, “Let’s make this interesting.” So we stopped playing chess. — Matt Kirshen |