Adds “src” to “dest” and replacing the original contents of “dest.” Both operands are binary.
Clocks
Operands
286
386
486
Size Bytes
reg, reg
2
2
1
2
mem, reg
7
7
3
2-4
reg, mem
7
6
2
2-4
reg, immed
3
2
1
3-4
mem, immed
7
7
3
3-6
accum, immed
3
2
1
2-3
†Source is unchanged by the operation, and the sum is stored in the destination operand. The set of possible operands is the same as for the instruction.
Memory & Memory
Memory & Immediate
Memory & Register
INCLUDE Irvine32.inc
.data
X SDWORD 100
Y SDWORD -200
.code
main PROC
add X, Y
mov eax, X
call WriteInt
exit
main ENDP
END main
INCLUDE Irvine32.inc
.data
X SDWORD 100
.code
main PROC
add X, -200
mov eax, X
call WriteInt
exit
main ENDP
END main
INCLUDE Irvine32.inc
.data
X SDWORD 100
.code
main PROC
mov eax, -200
add X, eax
call WriteInt
exit
main ENDP
END main
Output
Output
Output
†Note that the x86 assembly languages are case-insensitive.