lw
, lh
, and lb
Instructions
lw rd, mem
# load word
lw
instruction loads a word into a register from memory.
When a word (4-bytes) is loaded or stored the memory address must be a multiple of four.
This is called an alignment restriction.
Addresses that are a multiple of four are called word aligned.
This restriction makes the hardware simpler and faster.
lh rd, mem
# load halfword
lh
, where the address must be halfword aligned.
Attempting to load a halfword from an unaligned address will cause a trap.
It extends the sign bit of the halfword in memory into the upper two bytes of the register.
lhu
extends with zeros.
lb rd, mem
# load byte
lb
instruction loads the byte from memory into the low order eight bits of the register.
Another way to say this is that the lb
instruction loads the register with a 32-bit sign extended version of the byte at the designated address.
lbu
extends with zeros.
lw |
lh
(
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lw |
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.data val .word -10 .text lw $a0, val li $v0, 1 syscall |
.data val: .half -10 .text lh $a0, val li $v0, 1 syscall |
.data val: .byte -10 .text lw $a0, val li $v0, 1 syscall |
Output | Output | Output |
lb
(
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.data val: .byte -10 .text lb $a0, val li $v0, 1 syscall |
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Output | ||
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