Slide 15.4: Accessing a cache

Accessing a Cache

Below is a sequence of nine memory references to an empty 8-block cache:

Decimal address of reference	Binary address of reference	Hit or miss in cache	Assigned cache block (where found or placed)
22	10110₂	miss	10110₂ mod 8 = 110₂
26	11010₂	miss	11010₂ mod 8 = 010₂
22	10110₂	hit	10110₂ mod 8 = 110₂
26	11010₂	hit	11010₂ mod 8 = 010₂
16	10000₂	miss	10000₂ mod 8 = 000₂
3	00011₂	miss	00011₂ mod 8 = 011₂
16	10000₂	hit	10000₂ mod 8 = 000₂
18	10010₂	miss	10010₂ mod 8 = 010₂
16	10000₂	hit	10000₂ mod 8 = 000₂

The above references are depicted as follows. The figures show the cache contents after each miss in the sequence has been handled. The cache is initially empty, with all valid bits (V entry in cache) turned off (N).

The tag field will contain only the upper portion of the address. The full address of a word contained in cache block i with tag field j for this cache is

j × 8 + i

For example, in cache f, index 010₂ has tag 10₂ and corresponds to address 10010₂.