Slide 15.4: IMUL instruction (cont.)
Slide 15.6: IDIV instruction
Home

DIV Instruction

The DIV (unsigned divide) instruction performs 8-, 16-, or 32-bit unsigned integer division.

The single register or memory operand is the divisor. The formats are on the right:  
 Dividend   Divisor   Quotient   Remainder 
AX r/m8 AL AH
DX:AX r/m16 AX DX
EDX:EAX r/m32 EAX EDX

DIV — Unsigned Divide
Usage: div src
Flag O D I S Z A P C
Result *     ? ? ? ? ?

Unsigned binary division of accumulator by source. If the source divisor is a byte value then AX is divided by “src” and the quotient is placed in AL and the remainder in AH. If source operand is a word value, then DX:AX is divided by “src” and the quotient is stored in AX and the remainder in DX.
Clocks
Operands 286 386 486 Size Bytes
reg8 14 14 16 2
reg16 22 22 24 2
reg32   38 40 2
mem8 17 17 16 2-4
mem16 25 25 24 2-4
mem32   41 40 2-4

 8-Bit Division   16-Bit Division   32-Bit Division  
 .data
 x  BYTE  40
 y  BYTE  03
 .code
 movzx  eax, x
 div    y
 call   WriteHex
 
 .data
 x  WORD  601h
 y  WORD  20h
 .code
 mov   dx, 0
 mov   ax, x
 mov   bx, y
 div   bx
 call  DumpRegs
 
 .data
 x  QWORD  800010000h
 y  DWORD  20000h
 .code
 mov  edx, DWORD PTR x+4
 mov  eax, DWORD PTR x
 div  y
 call DumpRegs
 Output   Output   Output 
 



  AX =   DX =



  EAX =
  EDX =